The present invention relates generally to an integrated circuit (IC) design, and more particularly to a regenerative power-on control circuit.
A power-on control circuit is typically used in a circuit environment where a number of voltages supplies are powered on sequentially in order to avoid bus contention. The power-on control circuit generates a power-on control signal controlling a post driver. When an I/O voltage supply is powered up and a core voltage supply is not, the power-on control signal would set the post driver in a high impedance state, thereby avoiding the bus contention. When the core voltage supply is powered up after the I/O voltage supply is powered on, the power-on control signal then sets the post driver in a normal operation state.
Conventional power-on control circuits employ a power-on detection mechanism to control a protection circuit that can avoid conflicting signals for the post driver during power up processes. However, these conventional power-on control circuits have certain drawbacks. For example, the control circuit may not be able to regenerate the power-on control signal to control the protection circuit when the core voltage supply is powered down and up again. As another example, the conventional power-on control circuits may consume unnecessary power when both the I/O and core voltage supplies are fully turned on.
Therefore, it is desirable to have a power-on control circuit that can regenerate the power-on control signal whenever the core voltage supply is powered up and down without consuming unnecessary power.